Key skillsets :

1. Good understanding of DDR4, DDR5, NVDIMM
2. Good understanding of different DIMM types (UDIMM/SODIMM/RDIMM/LRDIMM/LPDDR)
3. Good understanding of UMC features like ECC, SME, SEV, RAS etc
4. Strong understanding of Security Firmware on ARM/X86 platforms
5. Firmware development experience on X86 platforms
6. Low-level driver and Board Support Package (BSP) development

Key skillsets :

1. Side-band/Out-of-band server management
2. Experience in OpenBMC stack development is mandatory.
3. Need your help to close on the BMC FW position especially since it is a critical position for us. We are looking for profiles who have experience in openBMC and C mandatorily for at least 5 years and who are immediate joiners only.

Location: Bangalore

Experience: 5+ Years

Job Description:

We are looking for a highly skilled Design Verification Engineer with extensive experience in CPU subsystem verification, bus protocol validation, and power-aware verification. The ideal candidate will have a deep understanding of ARM/RISCV architectures, AXI/AHB/APB protocols, and be proficient in industry-standard verification methodologies and tools.

Key Responsibilities:

* Perform CPU (ARM/RISCV) subsystem verification including performance modeling and validation.
* Verify bus protocols and bridge logic, including AXI, AHB, and APB interfaces.
* Develop test benches and verification environments using System Verilog and UVM/OVM.
* Execute power-aware verification flows using UPF/CPF, ensuring low-power design integrity.
* Conduct subsystem-level and GLS (Gate-Level Simulation) verification.
* Analyze and report performance verification metrics, identifying and optimizing bottlenecks.
* Use ClearCase/Perforce for configuration management and debug/simulation environments for issue resolution.
* Automate verification tasks using scripting languages such as Perl, Tcl, or Python.

Required Skills and Experience:

* eep understanding of bus protocols (AXI, AHB, APB) and bridge logic.
* Strong experience in CPU subsystem verification and performance modeling.
* Proficiency in System Verilog, UVM/OVM, and Verilog.
* Experience with power-aware verification (UPF/CPF) and subsystem-level GLS.
* Hands-on experience with ClearCase, Perforce, and major EDA simulation/debug tools.
* Scripting proficiency in Perl, Tcl, and/or Python.
* Excellent debugging, analytical, and problem-solving abilities.

Location: Bangalore

Experience: 5+ Years

Job Description:
We are seeking an experienced RTL Design Engineer with a strong background in multi-clock and multi-voltage domain design, front-end quality checks, and low power methodologies. The ideal candidate should have hands-on experience in front-end flows such as Lint, CDC, Synthesis, and LEC, along with a good understanding of memory or cache controller subsystems.

Key Responsibilities:
* Design and verify multi-clock and multi-voltage domain systems.
* Perform RTL front-end quality checks, including Lint, CDC, Synthesis, LEC, and Low Power checks.
* Ensure RTL quality and adherence to design standards across the front-end flow.
* Work closely with Subsystem and/or SoC Integration teams for design integration, debug, and signoff.
* Apply UPF-based low power design techniques and perform related verification checks.
* Collaborate with architecture and verification teams to meet performance, power, and functionality targets.
* Contribute to automation and process improvement initiatives within the design flow.

Required Skills and Experience:
* Experience in multiple clock and voltage domain design.
* Working knowledge of front-end flows: Lint, CDC, Synthesis, and related quality checks.
* Understanding of UPF and Low Power design/verification.
* Familiarity with memory subsystems, such as Memory Controller or Cache Controller.
* Experience in RTL integration and debugging at subsystem or SoC level.
* Strong analytical, problem-solving, and debugging skills.

Location: Bangalore

Experience: 5+ Years

Job Description:
We are looking for a Design Verification (DV) Engineer with strong hands-on experience in IP/Block or Subsystem level verification. The ideal candidate should be proficient in System Verilog, UVM, and Low Power Verification (UPF), along with exposure to Formal Verification and ARM-based protocols.

Key Responsibilities:
* Perform IP/Block and Subsystem level verification using System Verilog and UVM methodology.
* Develop and maintain test plans, test benches, and coverage models for verification.
* Conduct Low Power Verification using UPF (Unified Power Format).
* Analyze and achieve code coverage and functional coverage goals.
* Work on Formal Verification to ensure design correctness.
* Verify designs implementing ARM protocols (AXI, AHB).
* Develop and maintain automation scripts using Perl or Python to improve verification efficiency.

Required Skills and Experience:
* Hands-on experience in IP/Block or Subsystem level verification.
* Strong proficiency in System Verilog and UVM.
* Experience in Low Power Verification using UPF.
* Knowledge of Formal Verification techniques and tools.
* Familiarity with ARM protocols – AXI, AHB.
* Scripting experience in Perl, Python, or similar languages.
* Excellent debugging, problem-solving, and analytical skills.

Location: Noida

Experience: 5+ Years

Job Description:
We are seeking a highly skilled Design Verification (DV) Engineer with strong expertise in core components and complex subsystems. The ideal candidate will have hands-on experience in DDRSS and Cache Controller verification, along with deep technical and debugging proficiency.

Key Responsibilities:
* Work on standard DV profiles with a focus on DDRSS.
* Contribute to the verification of core components and complex subsystems.
* Develop and execute test plans, test benches, and verification environments.
* Utilize advanced debugging techniques to identify and resolve design and verification issues.
* Collaborate with design and architecture teams to ensure comprehensive coverage and validation.

Required Skills and Experience:
* Strong experience in Cache Controller and complex subsystem verification.
* Proficiency in core and subsystem areas.
* Excellent debugging skills and problem-solving ability.
* Experience in working with standard verification methodologies (UVM/OVM/SystemVerilog) is preferred.
* Exposure to memory interfaces (DDRSS) is a must.

Design Verification Engineer – CPU Subsystem, Bus Protocols, and Power-Aware Verification

RTL Design Engineer – Low Power, Multi-Clock Domain, and Front-End Quality

Design Verification Engineer – IP/Subsystem, Low Power, and Formal Verification

Design Verification Engineer – Core and Subsystem (DDRSS, Cache Controller)

Location: Noida

Experience: 4+ Years

Mandatory Skills: 

Ø Block level Timing Constraints enablement & analysis.
Clocking & Data flow understanding.

Ø Well versed in reviewing check timing and Constraints QoR checks + Constraints Validation understanding.

Ø Able to interact with Implementation team counterparts for block timing closure.

Ø CTS building understanding along with Clock Tree spec review/closure.

Ø Timing ECOs & Final Timing last mile closure at block level.
Scripting like TCL, Unix etc.

Location: Bangalore

Experience: 5+ Years

Mandatory Skills: 

Ø Spyglass, RDC, CLP, PLDRC, CDC, DC-Compiler,
. Strong expertise in Verilog/System Verilog RTL coding and micro-architecture development.

Ø Familiarity with wireless protocols such as IEEE 802.11 (a/b/g/n/ac/ax/be), LTE, or 5G NR is highly desirable.
. Solid understanding of bus protocols (AXI, AHB, APB) and bridge logic.

Ø Experience with wireless modem IPs or similar high-performance digital blocks is a plus.

Ø Familiarity with low-power design methodologies and CDC handling.

Ø Hands-on experience with tools like Spyglass, 0-in, Design Compiler, PrimeTime, and simulation environments.

Ø Exposure to post-silicon debug and SoC integration challenges.

Ø Knowledge of Design Tool Flows including Spyglass, RDC, CLP, PLDRC, CDC, DC-Compiler, Prime time, synthesis, simulation etc
.

Location:Chennai

Experience: 4+ Years

Mandatory Skills:

Ø Strong Debug, UVM, System Verilog.
Understanding Specs and Standards and developing relevant test plans.

Ø Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved.

Ø Thorough understanding of Digital design concepts.

Ø Thorough understanding dv methodologies and tools.

Ø Good understanding of PCIe and CXL protocols is an added advantage.

Ø Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite/CHI.

Location: Bangalore

Experience: 2-3 Years

Mandatory Skills:

Ø SOC level Mixed Signal and High-Speed Interfaces verification Engineer.

Ø Experience of 2 years of Design Verification.
Responsible for RTL and GLS level validation at SOC. Post Silicon validation support

Ø Familiarity with basic concepts of SV, UVM and C-based test case bringup.

Ø Understanding of GLS simulations and debug is a plus.

Location: Bangalore

Experience: 4+ Years

Mandatory Skills:

Ø Hands on experience in IP/Block or Sub system level verification.

Ø Hands on experience in Low Power Verification/UPF, code overage and functional coverage.

Ø Experience in Formal verification.

Ø Experience in System Verilog and UVM is a must.

Ø Experience in ARM Protocols – AXI and AHB.

Ø Familiarity with scripting languages like Perl, Python.

Location: Bangalore

Experience: 4-5 Yrs

Mandatory Skills:

Ø Exposure to Thermal and Vmin Measurement is mandate.
Running workloads at different innerloop, outerloop temperatures, Vmin and performing Vmin.

Ø Creation of SW builds with specific Vmin, temperature, etc. settings.

Ø Operation of TCU, Thermal chamber for running thermal experiments with no thermal throttling and controlled environment experiments .

Ø Performance mode, mission mode performance extraction .
Writing basic practice scripts (.cmm) for measurements above.
CTlogger installation and usage with different clocks enabled/disabled.

Ø Power waveform measurements using kratos on Power measurement QRD, RCM, etc. and post processing in the Kratos data viewer.

Ø CPR programming on hardware, Run workloads with CL-CPR, Temp loop, ACD enabled and assessing the benefit of each .

Location: Bangalore

Mandatory Skills:
Spyglass, RDC, CLP, PLDRC, CDC, DC-Compiler,
Strong expertise in Verilog/System Verilog RTL coding and micro-architecture development.
Familiarity with wireless protocols such as IEEE 802.11 (a/b/g/n/ac/ax/be), LTE, or 5G NR is highly desirable.
Solid understanding of bus protocols (AXI, AHB, APB) and bridge logic.
Experience with wireless modem IPs or similar high-performance digital blocks is a plus.
Familiarity with low-power design methodologies and CDC handling.
Exposure to post-silicon debug and SoC integration challenges.
Design Tool Flows including Spyglass, RDC, CLP, PLDRC, CDC, DC-Compiler, Prime time, synthesis, simulation etc.

Location: Bangalore / Chennai

Mandatory Skills:
Understanding Specs and Standards and developing relevant test plans
Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase
the rate with which bugs are found and resolved
Thorough understanding of Digital design concepts
Thorough understanding dv methodologies and tools
Good understanding of PCIe and CXL protocols is an added advantage
Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite/CHI

Location: Bangalore

Mandatory Skills:
SOC level Mixed Signal and High-Speed Interfaces verification Engineer.
Experience of 2 years of Design Verification.
Responsible for RTL and GLS level validation at SOC. Post Silicon validation support
Familiarity with basic concepts of SV, UVM and C-based test case bring up.
Understanding of GLS simulations and debug is a plus.

Location: Bangalore

Mandatory Skills:
Hands on experience in IP/Block or Sub system level verification.
Hands on experience in Low Power Verification/UPF, code coverage and functional coverage.
Experience in Formal verification.
Experience in System Verilog and UVM is a must.
Experience in ARM Protocols – AXI and AHB.
Familiarity with scripting languages like Perl, Python

Location: Bangalore

Mandatory Skills:
Exposure to Thermal and Vmin Measurement is mandate
Running workloads at different innerloop, outerloop temperatures, Vmin and performing Vmin

Creation of SW builds with specific Vmin, temperature, etc. settings

Operation of TCU, Thermal chamber for running thermal experiments with no thermal throttling and controlled environment experiments

Performance mode, mission mode performance extraction
Writing basic practice scripts (.cmm) for measurements above
CTlogger installation and usage with different clocks enabled/disabled

Power waveform measurements using kratos on Power measurement QRD, RCM, etc. and post processing in the Kratos data viewer

CPR programming on hardware, Run workloads with CL-CPR, Temp loop, ACD enabled and assessing the benefit of each

No. of Positions : 1

Experience : 3+ Years

Location : Bangalore

Key Skills / Highlights : SERDES IOs (PCIe, USB3, UFS, Ethernet) using test equipment (BERT, Oscilloscope, VNA) in (GPU/SOC/CPU).

Urgency : Immediate preferred

JD :

Responsibilities:

• Validate high-speed SERDES IOs (PCIe, USB3, UFS, Ethernet) using test equipment (BERT, Oscilloscope, VNA) in NVIDIA chips (GPU/SOC/CPU).
• Understand and execute the electrical validation test plan.
• Set up DUT, test equipment, run tests, and record observations.
• Compare results with specifications and note discrepancies.
• Analyze issues or failures and collect data for root cause identification.

Qualifications:

• B.E. in Electrical/Electronics
• 3 years of relevant experience

Required Skills:

• Strong knowledge of high-speed SERDES IO from electrical perspective
• Hands-on electrical validation experience with SERDES IO
• Understanding of signal integrity concepts
• Knowledge of signal quality parameters and measurements
• Proficiency with high-speed test equipment like Oscilloscope, BERT, VNA, etc.
• Ability to interpret board design schematics and layouts
• Familiarity with scripting languages (Python/Perl)
• Strong problem-solving, communication, and collaboration skills

Desirable Skills:

• Silicon PVT characterization experience
• Scripting to control test equipment using SCPI commands
• Knowledge of high-speed SERDES IO protocols
• Debugging experience

No. of Positions : 4

Experience : 4+ Years

Location : Bangalore

Key Skills / Highlights : Embedded, Android, HAL, Audio, Video, Camera, Graphics, Framework, OpenMax, Codec2,  ALSA, CTS,  I2S, Tensorflow

Urgency : Immediate preferred

JD :

Mandatory Skills:

1. Engineer with 4+ years of experience in Android Framework /HAL/ driver development
2. Strong C/C++ development skills with a good understanding of object-oriented design
3. Good understanding of Android framework, overall Android Architecture.
4. Proficient in any one of Android HAL amongst Audio, Graphics, Camera, Power etc.
5. Desirable experience with Multimedia framework such as OpenMAX, Codec2.
6. Compliance to CTS/VTS and support in resolving defects
7. Preferrable exposure to Machine learning, Deep Learning
8. Strong background in embedded systems development
9. System knowledge, System Debugging

No. of Positions : 6

Experience : 6+ Years

Location : Bangalore

Key Skills / Highlights : Linux Kernel Driver, device driver, Linux Graphics Driver, DRM/KMS, Video driver, Vaapi, V4L2, Audio DSP, I2S/TDM, Ethernet Driver, Virtualization, Vulkan, Mesa, OpenCL, OpenGL, RTOS

Urgency : Immediate preferred

JD :

Mandatory Skills:

1. Engineer with 6+ Yrs of experience in embedded Linux driver/kernel development.
2. Strong C development skills.
3. Experience with any one of the driver development domain
• Graphics driver – DRM/KMS, OpenGL, Vulkan, OpenCL, Mesa.
• Multi Media-Video driver – Vaapi, vdpau, gstreamer, v4l2.
• Power management – System to RAM, S0ix3.
• Display Driver development – X, Wayland, Weston, Display driver
• Experience with Audio sub-system, Audio drivers’s, frameworks and ALSA SOC(ASOC), Audio protocols like I2S/TDM.
• Proficient in yocto development.
• Virtualization – Xen, KVM, QNX hypervisor knowledge.
• Ethernet Driver – Network driver development.
4. Good working experience with IPC, DMA driver development.
5. Experience with kernel mode driver programming in Linux
6. Linux Device driver programming experience in Linux Kernel and Drivers.
7. Experience dealing with Linux community and Open Source contribution a plus
8. System knowledge, System Debugging
Keywords: Linux Kernel Driver, device driver, Linux Graphics Driver, DRM/KMS, Video driver, Vaapi, V4L2, Audio DSP, I2S/TDM, Ethernet Driver, Virtualization, Vulkan, Mesa, OpenCL, OpenGL, RTOS

No. of Positions : 1

Experience : 4+ Years

Location : Bangalore

Key Skills / Highlights : WDD, X86, WDM, KMDF, UMDF,WinDBG

Urgency : Immediate preferred

JD :

Mandatory Skills:

1. 4+ years in Windows driver development, preferably with AMD or similar x86 platforms.
2. Strong experience in Windows networking driver development.
3. Experience in Windows kernel-mode driver development (WDM, KMDF, UMDF).
4. Proficiency in C/C++ and debugging tools (WinDbg, TraceView).
5. Experience in analyzing and debugging kernel crash dumps (WinDBG).
6. Familiarity with PCIe enumeration, device ID handling, and WHQL certification processes.
7. Experience with Ethernet MAC/PHY integration and redriver configuration.
8. Knowledge in IO modules like i2c, smbus, uart is added advantage.

Keywords: Windows Driver, Ethernet driver, WDM, KMDF, UMDF, WHQL, IO, I2C, SMBUS, UART, Virtualization, virtio.

No. of Positions : 2

Experience : 5+ Years

Location : Bangalore

Key Skills / Highlights : Fimware development, C Linux, RTOS, DD concepts, Kernel

Urgency : Immediate preferred

No. of Positions : 2

Experience : 5-7 Years

Location : Bangalore

Key Skills / Highlights : C++ and Python, AI/ML tools and frameworks & Embedded Systems or SoC validation

Urgency : High

JD :

Required Skills:

• Strong programming skills in C++ and Python
• Experience in developing tools for Embedded Systems or SoC validation
• Familiarity with AI/ML tools and frameworks for productivity enhancement
• Good understanding of hardware-software interaction, especially in pre/post silicon environments
• Experience with version control systems (e.g., Git), CI/CD pipelines, and issue tracking tools (e.g., JIRA)
• Excellent problem-solving and debugging skills

No. of Positions : 2

Experience : 3-5 Years

Location : Bangalore

Key Skills / Highlights : High-Speed IOs such as MIPI MPHY UFS Gear 5/4/3, PCIe Gen4/3, USB4/USB3 Gen2/Gen1, HDMI, DP, DPoC etc. using hardware & software validation tools, oscilloscopes, BERT & logic analyzers.

Urgency : Immediate preferred

JD :

Key Responsibilities :

• Defining and executing the overall High-Speed IO IP Electrical test plans and validation strategy for AMD Semi-Custom SOC products including the compliance and logo testing related to the various High-Speed IOs such as MIPI MPHY UFS Gear 5/4/3, PCIe Gen4/3, USB4/USB3 Gen2/Gen1, HDMI, DP, DPoC etc. using hardware & software validation tools, oscilloscopes, BERT & logic analyzers.
• Working closely with supporting teams in SOC design, High-Speed IO IP development, Board Design, Simulation, firmware and diagnostics ensuring readiness for first silicon arrival, electrical characterization across PVT, submitting the test reports to different stake holders and blessing the IO.
• Participate and contribute to help in RCA of various High-Speed IO related issues throughout the development life cycle.
• Participate in enhancing AMD’s High-Speed IO validation capabilities, including tool and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives.
• Engaging with the various High-Speed IO suppliers in support of the SOC system development and the validation execution.


Preferred Experience:

• 5-12 years of IO Electrical and Logo Compliance Experience in at least one or several of Latest cutting Edge HSIOs such as UFS MIPI MPHY Gear 5/4/3, PCIe Gen6/5/4, USB4/3 etc.
• Working knowledge of any one or multiple High Speed IO technologies such as USB, HDMI, DP, DPoC, PCIe and others (SVI, I2C, JTAG etc.) that fall into a category we call MiscIO. Having a strong background in SI work with High-Speed IO technologies is a major plus.
• Solid understanding and vast experience on Test and characterization methodology of DDR or High-Speed IO interfaces which includes electrical compliance specifications such as eye diagram, differential signaling, jitter decomposition and analysis, Receiver-Jitter-Tolerance, transmission line considerations, Embedding/de-embedding, Measuring Various Types of channel losses, S-param measurements and Analysis, Phase Noise and Spectrum analysis, Spur measurements etc. through Latest HSIOs Lab Equipment.
• Experience in using High End oscilloscopes, J-BERT, Network analyzers ENA/VNA/TDR, spectrum analyzer, Phase Noise Analyzers, clock recovery, signal/function generators, Protocol, and logic analyzers etc.
• Good to have Team Lead capabilities with proven track record of technical expertise in the development & execution of platform level electrical & functional Compliance/Logo test plans.
• Should be able to use PCB design tools such as Orcad, Allegro, Mentor Graphics etc.
• Having working knowledge of any one of SI Simulation tools such as Ansys HFSS, Power-SI, Sigrity, ADS is a major plus.
• Hands on Experience and strong fundamentals on S-param Extraction, E2E channel Simulation, use of IBIS/AMI models, Simulation to Post Silicon measurements correlation for HSIOs can be a definite asset.
• Automation skills especially using Python or any other languages like C/C++, Perl, Ruby, C# is desirable.
• Must have excellent written and verbal communication skills for both internal and customer facing interaction.
• Attention to detail and the ability to analyze data quickly is a must.

No. of Positions : 1

Experience : 3-5 Years

Location : Bangalore

Key Skills / Highlights :

Urgency : Immediate preferred

JD :

Key Responsibilities :

• Defining and executing the overall High-Speed IO IP Electrical test plans and validation strategy for AMD Semi-Custom SOC products including the compliance and logo testing related to the various High-Speed IOs such as MIPI MPHY UFS Gear 5/4/3, PCIe Gen4/3, USB4/USB3 Gen2/Gen1, HDMI, DP, DPoC etc. using hardware & software validation tools, oscilloscopes, BERT & logic analyzers.
• Working closely with supporting teams in SOC design, High-Speed IO IP development, Board Design, Simulation, firmware and diagnostics ensuring readiness for first silicon arrival, electrical characterization across PVT, submitting the test reports to different stake holders and blessing the IO.
• Participate and contribute to help in RCA of various High-Speed IO related issues throughout the development life cycle.
• Participate in enhancing AMD’s High-Speed IO validation capabilities, including tool and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives.
• Engaging with the various High-Speed IO suppliers in support of the SOC system development and the validation execution.


Preferred Experience:
• 5-12 years of IO Electrical and Logo Compliance Experience in at least one or several of Latest cutting Edge HSIOs such as UFS MIPI MPHY Gear 5/4/3, PCIe Gen6/5/4, USB4/3 etc.
• Working knowledge of any one or multiple High Speed IO technologies such as USB, HDMI, DP, DPoC, PCIe and others (SVI, I2C, JTAG etc.) that fall into a category we call MiscIO. Having a strong background in SI work with High-Speed IO technologies is a major plus.

No. of Positions : 1

Experience : 0-2 Years

Location : Hyderabad

Key Skills / Highlights : Graphics driver validation, Windows/Linux OS, testing methodologies, scripting

Urgency : Immediate preferred

JD :

a. Kindly note that it is for QA Profile:-
b. - Minimum 0-2 Years of experience in SW device driver validations with a Computer/IT/ECE/EEE engineering background.
c. - Experience in graphics driver validation.
d. - Good understanding of Windows/Linux operating systems.
e. - Good understanding of testing methodologies.
f. - 3D Games and Video/Multimedia testing experience will be an added advantage.
g. - Scripting and programming knowledge is an added advantage.
h. - Preference for those candidates who can join at the earliest.

No. of Positions : 1

Experience : 3+ Years

Location : Bangalore

Key Skills / Highlights : C/C++, Python, ML frameworks, ROCm/CUDA, Linux, GPU architecture

Urgency : High

JD :

• MS/BS degree in Computer Science or an equivalent. • Experience with Linux Commands is must.
• Experience with Scripting language like bash/powershell.
• Understanding of various python ML frameworks like Pytorch, Transformers etc.
• Understanding of various language and compiler for writing highly efficient custom Deep-Learning GPU Kernels. like Triton/Jax.
• Hands on Debugging Experience with gdb, valgrind etc.,br> • Experience and understanding of AI Models and Inferencing Engines like vllm/ollama/llama.cpp/sglang.
• Experience with Profiling tools needed to debug CUDA/ROCm Kernels like nsys/rocprof is a plus.
• Knowledge of GPU architecture, PC architecture.
• Experience in writing ROCM/CUDA Kernels/Shader.
• Deep understanding and experience in implementation of Machine learning and AI algorithm.
• Good communication skills and able to work with stakeholders effectively.
• Knowledge of x86 assembly language and x86/x64 CPU instructions is a plus.

Responsibilities:
1. Work on latest machine learning technologies.
2. Work on supporting for latest Linux operating system.
3. Work on AMD next generation GPUs/Accelerators.
4. Work on optimizing latest Rocm drivers and improve performance.
5. Design new machine learning technologies.

No. of Positions : 1

Experience : 1-4 Years

Location : Hyderabad

Key Skills / Highlights : GPU stack validation, Python/Shell, ROCm/OpenCL/CUDA, CI/CD, Linux, AI models

Urgency :High

JD :

Role Summary:
• Looking for an engineer to validate Software Stack Instinct GPUs with strong automation and debug skills.
• You will work on pre/post-silicon validation, feature testing, performance checks, and automation of test workflows.

Responsibilities:
• Validate features of GPUs (compute, PCIe, HBM, RAS, virtualization).
• Develop and run functional, stress, and performance tests.
• Automate test execution, reporting, and triaging using Python/Bash.
• Work with design, firmware, and driver teams to debug issues.
• Create validation plans, coverage tracking, and documentation.

Skills & Experience:
• 1–4 years experience in silicon/GPU/accelerator validation.
• Strong scripting/automation skills (Python/Shell is must).
• Low Level programming experience (C/C++ is a plus).
• Good understanding of GPU architecture, PCIe, memory, ROCm/OpenCL/CUDA.
• Experience in Linux environments and understanding of CI/CD automation frameworks is must.
• Understanding of AI Models and Frameworks.
• Innovative and self-motivated with strong problem-solving skills.

No. of Positions : 4

Experience : 8+ Years

Location : Bangalore

Key Skills / Highlights : RTL, Verilog/SystemVerilog, emulation tools, scripting, PCIe, USB, UART, SPI

Urgency : High

JD :

Technical Expertise
- Good understanding of computer architecture and digital systems RTL code for IP, sub-systems, and SoCs.
- Proficiency in hardware description languages (HDLs) such as Verilog or system Verilog.
- Experience in building emulation model builds from scratch for SoC components.
- Familiarity with emulation platforms and tools (e.g., Cadence Palladium, Mentor Graphics, Synopsys ZeBu). including model compilation, test execution, and debugging.
- Experience in Transactor /AVIP Integration and basic sanity.
- Experience in writing sanity testcases for Transactors (using SCEMI/DPI) or porting verification testcases to making emulation compatible.
- Familiarity with Emulation runtime flows and debugging techniques.
- Experience in setting up and configuring emulation environments.
- Ability to manage emulation servers, clusters, and resources effectively.
- Ability to develop and execute verification plans specific to emulation environments.
- Protocol knowledge of peripherals is a plus: Proficient in Arm CPU cores and PCIe Gen4/5, JTAG, SPI, UART, I2C, USB2.0, USB3.0, Display Port, HDMI, Ethernet 1G/2,5G/5G/10G

No. of Positions : 1

Experience : 6+ Years

Location : Bangalore

Key Skills / Highlights : Jenkins, GitHub Actions, Python, Groovy, SCADA, Azure DevOps, Snowflake, Artifactory

Urgency : High

JD :

Key Responsibilities:
• Be accountable for the automated build, test and release systems supporting firmware development.
• Own data automation for our team, including generation, ingress, conversion, egress, report outs, and documentation to enable rationalized summaries of product and process health.
• Optimize data processes & transformations to improve efficacy and efficiency of both staff and compute resources, defining and publishing critical metrics where appropriate.
• Engage with multi-functional leadership & teams to integrate your output with other project work streams
• Hands-on debug to root cause performance and data/analysis flow & delivery challenges; collaborate with peer teams to analyze and resolve issues.
• Assist multi-functional technical teams with targeted ad hoc analyses methodologies.
• Make an impact by collaborating with other specialists on common program test & debug activities and process improvements.

Preferred Experience:
• Expertise in languages: JSON, Python, Groovy, GH Actions scripting.
• Strong knowledge of CICD systems: Jenkins, Github Actions, etc.
• Strong proven experience in automating task and working with different CICD tools: Artifactory, Virtualization and Emulation tools.
• Experience with process Flow – GitHub, Nifi, ADF, Azure DevOps, Snowflake ELT, etc.
• Knowledge of SCADA – automation systems, test device endpoint control, & API experience preferred

Academic Credentials:
• Bachelor’s degree in related discipline preferred 

No. of Positions : 1

Experience : 3-6 Years

Location : Bangalore

Key Skills / Highlights : Windows Ethernet, Driver Validation, UEFI BIOS, Embedded IO Testing

Urgency : Immediate preferred

JD :

Key Responsibilities:
• Be accountable for the automated build, test and release systems supporting firmware development.
• Own data automation for our team, including generation, ingress, conversion, egress, report outs, and documentation to enable rationalized summaries of product and process health.
• Optimize data processes & transformations to improve efficacy and efficiency of both staff and compute resources, defining and publishing critical metrics where appropriate.
• Engage with multi-functional leadership & teams to integrate your output with other project work streams.
• Hands-on debug to root cause performance and data/analysis flow & delivery challenges; collaborate with peer teams to analyze and resolve issues.
• Assist multi-functional technical teams with targeted ad hoc analyses methodologies.
• Make an impact by collaborating with other specialists on common program test & debug activities and process improvements.

No. of Positions : 1

Experience : 3-5 Years

Location : Bangalore

Key Skills / Highlights : Python, HTML/JS, REST API, Django/FastAPI, Jenkins, MongoDB

Urgency : High

JD :

We have an immediate requirement in our validation team with major expertise on Windows Ethernet. We are looking to close this requirement asap.

Below is the profile

• Windows Ethernet validation Expertise
• Windows Driver Validation
• UEFI BIOS expertise
• Embedded IO Testing: USB, I2C, UART, SPI etc
• Automation & Tools: Good to have
• Debugging skills expertise
• Soft Skills: Documentation, problem-solving, teamwork, adaptability.

Immediate Joiner: - Exp 3 to 6

No. of Positions : 1

Experience : 3-9 Years

Location : Bangalore

Key Skills / Highlights : Linux (Ubuntu), Python, Shell, Git, x86/ARM SoCs, Jenkins, MongoDB

Urgency : Immediate preferred

JD :

Please provide profiles for automation team.

A creative python developer with strong analytical and problem-solving skills to help Automation team to create more tools and backends.
Experience – 3-5 years
frontend : html and java script
programming - strong Python knowledge is a must.
scripting : Shell and (groovy is good to have)
Concepts: REST API, HTML, Database Management
frameworks : django, fastapi or equivalent
Tools: jenkins, git, gerrit, grafana, powerBI, prometheus etc.
DB : experience with Relational and NoSQL DB (MySQL, MongoDB)

Candidate should be a strong hands-on python dev with good number of years spent on python.(at least half of his experience)
Please do preliminary screening of profiles.

No. of Positions : 4

Experience : >3 Years

Location : Bangalore

Key Skills / Highlights : Kernel validation, automation, scripting, x86, FreeBSD performance monitoring

Urgency : High

JD :

Experience – 3-9 years
Immediate joiner candidates preferred, max acceptable notice period is 40 days.

Must Have:
Strong hands-on experience in Linux (preferably Ubuntu).
Pls don’t share any profiles with Windows Experience
Strong Python Knowledge
Strong Shell script
CPU architecture, instruction set architecture, and/or design knowledge and/or experience.
  Working with version control systems : Git
Experience working on x86 or ARM SoCs (e.g., AMD, Intel, Qualcomm, NVIDIA)
Demonstrated execution mindset – individuals who are curious, quick learners, self-driven, and bring strong ownership and focus

Good to have:
Groovy, Pandas, numpy
Tools: jenkins, git, gerrit, grafana, powerBI, prometheus etc.
Database : experience with Relational and NoSQL DB (MySQL, MongoDB)

No. of Positions : 4

Experience : >7 Years

Location : Bangalore

Key Skills / Highlights :FreeBSD kernel, x86, PMC, IBS, C programming

Urgency : Immediate preferred

JD :

Each developer must have no less than 7 years of experience in the following technical areas: FreeBSD kernel architecture and internals. Prior contribution to upstream FreeBSD kernel code base is a bonus
X86 microarchitecture knowledge and expertise
Excellent understanding of performance monitoring on modern x86 platforms
• Prior experience with modern (Zen era) AMD architecture hardware, especially in performance monitoring (PMC, IBS, etc.) is a bonus.
• Excellent C programming skills.
Each test resource needs to have no less than 3 years of experience in the following technical areas: Modern Unix/Linux kernel validation; FreeBSD kernel validation is a bonus
• Good understanding of using performance management frameworks
• Good understanding of x86 architecture
• Excellent automation skills
• Ability to script testcases for different scenarios across the various performance monitoring frameworks. Prior experience with FreeBSD performance monitoring framework and validation thereof is a bonus

No. of Positions : 2

Experience : 7-10 Years

Location : Bangalore

Key Skills / Highlights : TPM/fTPM, Crypto, Root of Trust, Widevine, Trusted Apps

Urgency : Immediate preferred

JD :

Good knowledge about silicon security subsystem / policy, root of trust, TPM/fTPM, Widevine
• Good knowledge on security concepts like chain of trust , Crypto Algorithms.
• Good knowledge of trusted applications and handshake.

No. of Positions : 1

Experience : 7-10 Years

Location : Bangalore

Key Skills / Highlights : BIOS, PCIe, SoC power, UEFI, ACPI, AGESA

Urgency : Immediate preferred

JD :

• Good understanding and experience with BIOS, power management and PCIe
• Good knowledge SoC power management – CPU/Device power states, hot-plug etc
• Strong knowledge of UEFI BIOS, ACPI. AGESA knowledge is a big plus

No. of Positions : 1

Experience : 5-10 Years

Location : Bangalore

Key Skills / Highlights : DDR4/DDR5, DIMM types, ECC, SME, SEV, RAS

Urgency : Immediate preferred

JD :

Good understanding of DDR4, DDR5, NVDIMM
• Good understanding of different DIMM types (UDIMM/SODIMM/RDIMM/LRDIMM/LPDDR).
• Good understanding of UMC features like ECC, SME, SEV, RAS etc.

Need your help to close on the BMC FW position especially since it is a critical position for us. We are looking for profiles who have experience in openBMC and C mandatorily for atleast 5 years and who are immediate joiners only.

No. of Positions : 1

Experience : 5-10 Years

Location : Bangalore

Key Skills / Highlights : OpenBMC, C, debugging, git/gerrit

Urgency : Immediate preferred

JD :

• Side-band/Out-of-band server management.
• Experience in OpenBMC stack development mandatory.

Need your help to close on the BMC FW position especially since it is a critical position for us. We are looking for profiles who have experience in openBMC and C mandatorily for atleast 5 years and who are immediate joiners only.

IO Electrical Validation (2 Positions) : BLR

Python + SQL

QA Engineer

Windows QA Engineer

Mode : TP/PT/FTE

Location: Bangalore, F2F interview mandatory

Job Description:
Seeking a Software Development Engineer in Test to contribute to both automated and manual testing on a growing software QA team for highly visible customer-facing software for top clients. This role is ideal for a versatile, inquisitive, and creative test engineer with a passion for complex technical challenges, collaboration, and requirements gathering in a fast-paced and demanding environment. Testing involves highly complex systems that involve hardware, software, and firmware in the electrical and power domains. Experience in these areas is a big plus.

Essential Functions:
Work closely and collaboratively with the Technical Lead for Test, the QA and software development team, and other stakeholders to understand requirements for products under test and use those requirements to develop detailed test cases. Perform both manual and automation feasibility analysis, design, implement manual test cases and implement automated tests using a Python/Squish automation framework. Develop a deep understanding of the products and systems under test, including hardware, software, and electronics. Handle multiple priorities in a fast-paced environment and manage tension between timelines, quality, and features. Willingness to speak up, raise issues and risks, ask questions, and provide improvement recommendations.

Required Qualifications:
Experience in hands-on Software Testing and Test Automation, including UI Automation Technical expertise in Python, object-oriented design, software design principles and patterns, and automated testing best practices. Working understanding of JIRA and Git. Excellent organizational skills, attention to detail, strong analytical and problem-solving skills. Highly developed written and verbal cross-functional communication skills, team player, eager to learn and share new skills, and keep up with the latest technologies and tools in test automation.

Preferred Qualifications:
Experience with basic electronics, microcontroller programming, and bus communications. Experience with visual, performance, and Firmware and/or Hardware testing. Java development experience or ability to quickly learn new programming languages beyond Python.

Education:
Bachelor’s or Master’s degree in Computer Science, Software Engineering, or Computer Engineering.

Mode : TP/PT/FTE

Location : Bangalore, F2F interview mandatory

Bill rate : $12-13/hr, 180hrs/month

Testing role : Python automation on mobile SoC.

Preferred Qualifications :
Strong programming skills in modern Python Experience working with prototype devices SW development experience on Linux or Android Programming skills in Java, C/C++, JNI a plus

Minimum qualifications :
BS degree in Electrical Science or similar technical field of study or equivalent practical experience
Experience testing embedded software on SoC on Linux, Android or RTOS including understanding of HW architecture, board schematics, protocols & standards
Working proficiency and communication skills in verbal and written English
Passion for well tested code

Location : Bangalore

Work mode : FTE/PT

Skill-Set Need :
Programming: C, C++, Python
OS: Centos 9/10, ubuntu and the lib*so knowledge; Knowledge of kernels, libraries, applications; ability to compile

Running Benchmarks:
Experience or ability to run performance benchmarks on various WLs adjusting different CPU knobs. Systematically organize and present the results.

Performance tuning :
Understand and figure out various BIOS configurations and other knobs on Xeon for performance tuning.

Debug experience :
Knowledge on Data Streaming accelerator (preferred) and CSP Data Streaming solutions is plus